This invention relates to storing operands and results of vector operations in a computer.
In a vector operation, the same step (such as an arithmetic computation) is performed on all of the elements of a data vector (i.e. operands). Often, the operands are fetched from memory via a vector register file before being operated on by the vector processor (e.g., a floating point processor). And the vector results are likewise transferred back to the memory via the vector register file. The vector processor and register file collectively are known as a vector unit.
In order to provide temporary storage of as many vector elements (operands and results) as practical, random access memory (RAM) is often used in place of discrete registers to implement the register file. The vector RAM needs to have a high bandwidth capable of handling data transfers to and from the vector processor and the main memory. Sometimes the bandwidth is achieved by providing multiple ports on the RAM. Another approach is to perform multiple RAM accesses per cycle. Other schemes partition the vector register files into multiple independent RAMs.